SFR explanation for PIC16F873(5)

OPTION_REG ( Option register ) 81h,181h

By this register, pull-up control of B port, interrupt edge select, timer relations are controlled. As for the way of using a bit about the timer, refer to

the specification of timer (TMR0)

The value in the parenthesis is in the condition immediately after the turning on.

PBPU(inv) : PORTB Pull-up Enable bit

	1	:	PORTB pull-ups are disabled
	0	:	PORTB pull-ups are enabled ( by individual port latch values )

INTEDG : Interrupt Edge Select bit

	1	:	Interrupt on rising edge of RB0/INT pin
	0	:	Interrupt on falling edge of RB0/INT pin

T0CS : TMR0 Clock Source Select bit

	1	:	Transition on RA4/T0CKI pin
	0	:	Internal instruction cycle clock ( CLKOUT )

T0SE : TMR0 Source Edge Select bit

	1	:	Increment on high-to-low transition on RA4/T0CKI pin
	0	:	Increment on low-to-high transition on RA4/T0CKI pin

PSA : Prescaler Assignment bit

	1	:	Prescaler assigned to WDT
	0	:	Prescaler assigned to TMR0

PS2,PS1,PS0 : Prescaler Rate Select bits

PS2	PS1	PS0	TMR0	WDT
0	0	0	1:2	1:1
0	0	1	1:4	1:2
0	1	0	1:8	1:4
0	1	1	1:16	1:8
1	0	0	1:32	1:16
1	0	1	1:64	1:32
1	1	0	1:128	1:64
1	1	1	1:256	1:128