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Some troubles occurred in the process of this project. I put these for reference.
 The melody had sounded at the end of the skip processing.
Cause : Because silent canceling was done immediately after processing last in the skip.
Measure : After the last skip processing, it made cancel a silent 1 second later.
After sounding a chime, 7 times skip processing is carried out for every second for the title synchronization of melody. However, the melody has sounded by the 7th skip processing. I mistook with the skip processing ending if the fast forward counter became 0.
jjy_cont.asm
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4540 | led_sig05
decf led_1m,w ;1st of minute - 1
btfss status,z ;1/1 00:01 ?
goto led_cont ;No.
rbank2
movfw led_ff ;Read fast forward
btfsc status,z ;Fast forward ended ?
goto led_sig06 ;Yes.
rbank0
bcf portc,2 ;Set melody
bsf portc,4 ;Set silent
bsf portc,3 ;Fast forward
rbank2
decf led_ff,f ;Fast forward counter - 1
goto led_cont ;Jump to LED control
led_sig06
rbank0
bcf portc,4 ;Cancel silent |
It doesn't work normally when using the GPR of bank 1 and bank 2 from the head.
Cause : Because 5 bytes of higher rank of GPR was used as save area of various registers.
Measure : The memory allocation of bank 1 and bank 2 was changed from the 6th byte.
In the case of PIC16F877, the general purpose register(GPR) of bank 1 can be used from 0xA0 address and the bank 2 can be used from 0x110 address. But in original software, the bank 1 is used from 0xA5. I did not find this reason. So, I allocated bank 1 from 0xA0 and allocated bank 2 from 0x120 to save a memory. It is possible to use bank 2 from 0x110, however, I allocated from 0x120 to arrange for the position. If allocating from 0x110, this phenomenon has the possibility not to have understood. The flag area which displays a hyphen on LED during time taking in was assigned at 0x120 of bank 2. This flag is the one to control the display or non-display of the hyphen every second. However, if a power supply is switched on, a hyphen will light up only once first and it will not blink after that. The flag is changed by somewhere.
I used the debug mode of MPLAB and did step analysis. I checked that the flag had been set up normally and went on. I discovered that a flag was changed by the tmp_w (W register saving area) writing which is at the head of interruption processing. tmp_w is assigned to the bank 0. However, bank-switching processing is not performed. Therefore, if an interrupt occurs in the state of bank 2, the memory of bank 2 will be rewritten. 5 bytes of higher rank of bank 0 is used as save area of various registers. It seems that it is expected to make them as a common area to all banks. However, recovery of W register is changed to bank 0. So, it seems to be a bug. Except W register, they are saved after changing to bank 0. I cannot understand the design concept of this portion. Therefore, I allocated bank 1 from 0xA5 and bank 2 from 0x125. Thereby, blink control of a hyphen came to operate normally.
LED display becomes abnormal when setting a timer.
Cause : Competition of a FSR register
Measure : The contents of the FSR register made save before using it by the LED display processing.
The original software has four kinds of timer features. In this time, I used them just as it is. However, when the time data of a timer was set up, the time display of LED became abnormal. Moreover, a time setup of a timer was not performed normally, either.
When skipping the processing which was added this time, the timer has been set up normally. Then, I checked the position which an abnormal phenomenon generates while changing the position of a RETURN instruction. And I discovered becoming abnormal, when indirect memory processing (FSR/INDF) used by the led_write subroutine was performed.
In timer setting processing, the memory is written using a FSR register. However, it seems that it presupposes that the contents of the FSR register aren't changed by the other processing. The processing which I added this time is executed every second. The operation of the timer setting doesn't end in 1 second. The contents of the FSR register is changed when LED display processing is done on the way of the timer setting operation. Therefore, it isn't possible to have done timer setting. I don't find the reason why the LED display becomes abnormal. I think that because the contents of the FSR register was changed, the whole processing became abnormal. Anyway, the timer setting and the LED display became normal by saving FSR register.
jjy_cont.asm
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4691 | led_write
rbank2
movwf led_wkdata ;Save input data
movfw fsr ;Read FSR
movwf led_fsr ;Save FSR
movlw b'00001111' ;Set mask
andwf led_wkdata,w ;Pickup LED data
rbank1
addwf led_ha,w ;LED pattern table HA + LED data
movwf fsr ;Set table address
movfw indf ;Read 7seg data
rbank0
movwf portd ;Set 7seg data
rbank2
movfw led_fsr ;Read saved FSR
movwf fsr ;Recover FSR
movlw b'10000000' ;Set mask
andwf led_wkdata,w ;Pick up selector data
rbank0
iorwf portd,f ;Set selector data
bsf portc,5 ;Start clock pulse
rbank2
call led_t100u ;100usec wait
rbank0
bcf portc,5 ;Stop clock pulse (Data latch)
rbank2
call led_t100u ;100usec wait
rbank0
return |
The display in the day of the week shifts.
Cause : The beginning in the day of the week was Sunday.
Measure : I changed as follows. 0=Lights out, 1=Sunday, 2=Monday, 3=Tuesday, 4=Wednesday, 5=Thursday, 6=Friday and 7=Saturday.
In spite of being Saturday, the display was Sunday. I thought that the beginning in the week is Monday.
The CPU stops when making battery drive.
Cause : CPU detected power-supply-voltage descent and reset.
Measure : Brown-out Reset (BODEN) of a configuration bit was repealed.
PIC16F877 have the function which detects the fall of power supply voltage and resets. In this circuit, I thought that detection was not carried out in order to stabilize power supply voltage by the constant voltage regulator. It seems that however, the delicate voltage variation when changing to battery is detected, and reset works.
jjy_cont.asm
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24 | processor 16F877
list f=INHX32
include p16f877.inc
include picmac1.inc
radix dec
__config h'3F32' ;OSC is HS
;RB3,RB6,RB7 are I/O
;Brown-out detection OFF
;Power-up timer ON
;Code protection OFF
;Data code protection OFF
;Watchdog timer OFF
errorlevel -302 ;Eliminate bank warning
errorlevel -307 ;Eliminate Setting page bits warning |
LED of a day of the week lights up thinly at the time of a battery drive.
Cause : The input voltage of CPLD was led to the power circuit inside.
Measure : It made the drive of CPLD stop when the voltage from the power unit stopped.
The power to the LED display control circuit and LED itself should stop when the AC power stopped. So, the LED in the day of the week should not be ON too. CPU is carrying out continuation operation with the backup battery. When examining +12V and +5V of the power unit when the battery drives, there is +3V voltage. The electric current which flows through the CPU unit is about 20 mA when the AC power is normal. However, it increases as much as 120 mA when making an AC power OFF. If CPU is removed, it will hardly carry out flow raw. I did not suspect CPLD at first. But a factor has only CPLD. When removing CPLD, only 20 mA as the assumption flow through the CPU unit. It seems that the voltage which is applied to the input terminal of CPLD is flowing into the power supply circuit of CPLD. It was not thinking just for a moment. I considered putting the diode for countercurrent prevention into the power supply circuit of CPLD at first as a measure. I stopped this method for some factors. The wiring has ended. The voltage drop by the diode occurs. The bad influence seems to come out in CPLD when passing for a long time in the condition. Finally OFF of AC power supply was detected by CPU, and it decided to suspend the output to CPLD. But all the ports of PIC are used at this time. Then, the port for the display LED of TCO (PORTC,0) was removed, and it changed into the port for surveillance of +12V power supply. Because +12V could not be directly applied on PIC, the voltage was dropped with the resistors. PORTC,0 is checked at the head of the LED display processing and if being 0V, all input prots of CPLD will make to 0V.
LED display subroutine is started up every second. Therefore, 120mA current flows into a CPU unit for a maximum of 1 second. For this reason, the regulator was changed into 1A type. 1 second is very long time for the electronic parts.
jjy_cont.asm
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4660 | led_disp
rbank0
btfss portc,0 ;AC Power ON ?
goto led_off ;No. Jump to LED contro; OFF
rbank1
btfsc det_mark_1st ;1st marker detected ?
goto led_dsp03 ;Yes. Jump to time decode check
---------------------------------------------------------------
led_off
clrf portd ;Clear PORTD
clrf porte ;Clear PORTE
bcf portc,5 ;Clear CK bit
return |
The segment of LED which has not carried out display control lights up for a moment.
Cause : Unknown.
Measure : Nothing is done.
The LED segment which has not carried out lighting control sometimes lights up. A lighting interval is not fixed. If the light is switched on for 1 second, the abnormalities of the contents written to the latch register can be considered. However, lighting does not continue for 1 second. I don't find cause. Because wiring is bundled, it is also considered that other signals ride as noise. But it is not scanning at high speed. A circuit is not high impedance. It isn't doing a measure because the occurrence frequencies aren't many and there is not a problem in case of practical use, too.
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