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PLL frequency synthesizer
(MC145163)


MC145163 is IC for the PLL frequency synthesizer which can specify the dividing ratio of the comparison frequency by BCD(Binary Coded Decimal).

Block diagram of the top is a clickable image map. You can jump to each page of the explanation when you click each block.

Top view

It is the inverter circuit to make oscillate a crystal oscillator.
The output of the inverter is returned to the input of the inverter through the crystal oscillator. By this, it makes do the oscillation which was stable at the natural frequency of the crystal oscillator.
The circuit this time makes an oscillation frequency 10.24MHz.

The dividing ratio of the reference frequency can be specified by two input terminals (RA0,RA1).
The condition of the input is developed by the four kinds with the decoder and the following dividing ratio can be specified.

There are four sets of input terminals of the BCD which specifies a dividing ratio and they can specify a dividing ratio by 3-9999 ranges.

The phase comparator compares a phase between the frequency which was divided with the reference frequency divider(fr) and the frequency which was divided with the comparative divider(fv).

The maximun rating

The electric characteristic